Primitives

In the paper, this is the primitive block layout generator stage. The public repo combines fixed GDS black boxes, parametric generators, data-driven optimizers, and a mock PDK definition.

Fixed Primitives

• FIXED_PRIMITIVES/pad.gds
• FIXED_PRIMITIVES/bga.gds
• FIXED_PRIMITIVES/nmos_bias_1.gds
• FIXED_PRIMITIVES/auto_gen_decap_lna_0_1.gds

Primitive Generators

• gen_inductor_layout.py
• gen_capacitor_layout.py
• gen_resistor_layout.py
• gen_tline_layout.py
• gen_cpwd_layout.py
• gen_casmos_layout.py
• gen_bbox_layout.py

Primitive Optimizers

• optimize_inductor.py
• optimize_capacitor.py
• optimize_resistor.py
• optimize_tline.py
• optimize_cpwd.py
• emx_estimator.py

Why This Matters

The paper emphasizes that passives are not chosen after layout. Instead, geometry selection and primitive realization happen early enough that placement and routing can make physically meaningful choices.