Modeling procedure

Iterative equation refinement using HSPICE measurements

The driver normally writes to 5t_ota/. This snapshot is stored as 5t_ota_example_run/ so publishing it does not confuse it with a live workspace. The driver deletes an existing WORK_DIR before every run.

01

Extract circuit topology

The DUT netlist is reduced to the device and node information required to formulate topology-dependent equations and gm/Id constraints.

02

Generate analytical equations

Each iteration produces a structured set of performance equations. The equations are recorded and compiled into an executable Python model.

03

Perform LUT-based sizing

The scalar model and gm/Id lookup table generate device dimensions and the iteration's .1 prediction report.

04

Run HSPICE characterization

The selected device parameters are applied to the testbenches. Extracted measurements are stored in the corresponding HSPICE report.

05

Evaluate with operating points

HSPICE operating-point parameters are supplied to the analytical equations to produce the model values used in the comparison.

06

Calculate relative error

Model predictions are compared with HSPICE measurements. Equations exceeding the tolerance are revised in the next iteration; iteration 9 meets the convergence criterion.

Archived data structure

Files produced during model refinement

Each directory in the published snapshot has a local README. The table below shows its place in the dataflow.

netlist/

Topology context

The compact six-transistor DUT used by initial and feedback prompt generation.

Directory guide
specs/

Design intent

Topology analysis, primitive groups, current budget, and device guidance consumed by the sizer.

Directory guide
prompts/

Iteration inputs

The gm/Id, initial-equation, error-correction, and vectorization instructions. The iteration N prompt produces the iteration N response.

Directory guide
llm_outputs/

Generated equations

Nine structured responses plus the iteration-9 vectorization response; these compile into executable models.

Directory guide
ota_models/

Executable equations

Nine scalar candidates and the final vectorized evaluator. Earlier stages remain useful for auditing.

Directory guide
ota_model_performance/

Model predictions

The model values produced during sizing and operating-point verification.

Directory guide
spice_performance/

HSPICE reference measurements

Nine HSPICE characterization summaries used for the Model vs HSPICE comparison.

Directory guide
testbenches/

Simulation boundary

The full DUT, universal measurement decks, baseline and updated parameters, wrapper, and run workspace.

Directory guide
__pycache__/

Disposable cache

Python bytecode only. It affects import speed, not equations, sizing, simulation, or convergence.

Directory guide

Iteration by iteration

What passed, what failed, and what was corrected

Each cell below is the absolute relative error between the analytical model and HSPICE for that metric and iteration. Green cells pass the 5% accuracy limit; red cells fail it. DC gain remains at 1.46% because it passed in Iteration 1 and the refinement flow preserves equations that already pass while correcting only failed metrics.

MetricIteration 1Iteration 2Iteration 3Iteration 4Iteration 5Iteration 6Iteration 7Iteration 8Iteration 9
DC gain1.46%1.46%1.46%1.46%1.46%1.46%1.46%1.46%1.46%
3 dB bandwidth4.85%4.85%4.85%4.85%4.85%4.85%4.85%4.85%4.85%
UGB1.53%1.53%1.53%1.53%1.53%1.53%1.53%1.53%1.53%
Phase margin0.25%0.01%0.01%0.01%0.01%0.01%0.01%0.01%0.01%
ICMR min6.74%11.62%6.02%5.15%2.86%2.86%2.86%2.86%2.86%
ICMR max4.37%4.37%4.37%4.37%4.37%4.37%4.37%4.37%4.37%
Output swing min141.34%3.73%3.73%3.73%3.73%3.73%3.73%3.73%3.73%
Output swing max8.08%8.08%8.08%8.08%8.08%8.08%1.62%1.62%1.62%
Positive slew37.59%24.82%17.71%21.89%18.91%17.73%44.70%21.89%0.72%
Negative slew32.90%101.30%32.90%4.12%4.12%4.12%4.12%4.12%4.12%
PSRR+15.21%10.57%8.40%9.33%5.88%1.75%1.75%1.75%1.75%
PSRR−15.14%3.71%3.71%3.71%3.71%3.71%3.71%3.71%3.71%
CMRR63.43%16.45%19.12%5.62%57.62%10.40%5.62%3.12%3.12%
01

Initial model

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error141.3%

Correct (5): DC gain, bandwidth, UGB, phase margin, ICMR max.

Needs work (8): ICMR min, both output swings, both slew rates, PSRR+, PSRR−, CMRR.

Largest error: output swing min, 141.3%. The next model corrects output swing and the large CMRR/slew mismatches.

02

Output swing correction

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error101.3%

Correct (7): DC gain, bandwidth, UGB, phase margin, ICMR max, output swing min, PSRR−.

Needs work (6): ICMR min, output swing max, both slew rates, PSRR+, CMRR.

Output swing min is fixed. Negative slew is now the largest error at 101.3%, so slew modeling becomes the main target.

03

Slew-rate refinement

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error32.9%

Full Iteration 3 comparison: prompt_stage4.txt (feedback used to create Iteration 4).

Correct (7): DC gain, bandwidth, UGB, phase margin, ICMR max, output swing min, PSRR−.

Needs work (6): ICMR min, output swing max, both slew rates, PSRR+, CMRR.

The gain model is already accurate. This revision targets slew: modeled negative slew is 7.723 V/µs versus 11.510 V/µs in HSPICE, so its error falls from 101.3% to 32.9%. The same six specs still miss the limit.

04

Negative slew converges

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error21.9%

Correct (8): DC gain, bandwidth, UGB, phase margin, ICMR max, output swing min, negative slew, PSRR−.

Needs work (5): ICMR min, output swing max, positive slew, PSRR+, CMRR.

Negative slew passes. Positive slew is the largest remaining error at 21.9%.

05

ICMR min converges; CMRR regresses

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error57.6%

Correct (9): DC gain, bandwidth, UGB, phase margin, both ICMR limits, output swing min, negative slew, PSRR−.

Needs work (4): output swing max, positive slew, PSRR+, CMRR.

ICMR min passes, but the CMRR change overshoots to 57.6% error. The next iteration repairs CMRR without losing the nine correct specs.

06

CMRR recovery

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error17.7%

Correct (10): DC gain, bandwidth, UGB, phase margin, both ICMR limits, output swing min, negative slew, PSRR+, PSRR−.

Needs work (3): output swing max, positive slew, CMRR.

CMRR error drops to 10.4% and PSRR+ passes. Positive slew remains worst at 17.7%.

07

Output swing max converges

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error44.7%

Correct (11): all specs except positive slew and CMRR.

Needs work (2): positive slew and CMRR.

Output swing max passes. CMRR is close at 5.6%, while positive slew regresses to 44.7%.

08

Only positive slew remains

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error21.9%

Correct (12): all specs except positive slew.

Needs work (1): positive slew, 21.9% error.

CMRR now passes. The final refinement is isolated to the positive-slew equation.

09

Converged

Model gain19.930 dBHSPICE gain20.226 dBGain error1.46%Worst error4.9%

Correct (13 of 13): DC gain, bandwidth, UGB, phase margin, both ICMR limits, both output swings, both slew rates, PSRR+, PSRR−, and CMRR.

Needs work: none.

The largest remaining difference is only 4.9% (3 dB bandwidth), below the 5% limit. The scalar model is accepted and vectorized.

Line plot of absolute relative error for thirteen OTA performance metrics over nine model-refinement iterations
Absolute relative error for each valid performance metric. The dotted red line marks the 5% convergence threshold. Select the plot to open it at full resolution.

Final result

Model vs HSPICE at convergence

Iteration 9 brings all 13 modeled specs within the 5% error limit. The complete comparison is shown below.

Iteration 9 comparison

Final analytical model and simulator measurements

Percent differences use the HSPICE magnitude as the reference.

Metric
Model
HSPICE
Difference
DC gain
19.930 dB
20.226 dB
1.46%
UGB
20.452 MHz
20.144 MHz
1.53%
Phase margin
95.439°
95.433°
0.01%
ICMR min
0.433 V
0.421 V
2.86%
ICMR max
0.823 V
0.788 V
4.37%
Output swing min
0.077 V
0.080 V
3.73%
Output swing max
0.783 V
0.796 V
1.62%
Negative slew
11.035 V/µs
11.510 V/µs
4.12%
CMRR
42.187 dB
43.546 dB
3.12%
Positive slew
12.463 V/µs
12.374 V/µs
0.72%
PSRR+
19.755 dB
20.106 dB
1.75%
PSRR−
43.517 dB
45.193 dB
3.71%
3 dB bandwidth
2.062 MHz
1.966 MHz
4.85%

Reproduce and extend

Use the snapshot as a reference, not as the live workspace

# The configured driver creates and owns 5t_ota/
bash llm_aided_modelling.sh

# Compare the fresh workspace with the preserved example
diff -ru 5t_ota_example_run 5t_ota

A byte-for-byte match is not expected: LLM responses, timestamps, simulator products, and optimization results can vary. Compare schemas, stage lineage, convergence behavior, and performance trends. A real run also requires API configuration, HSPICE on PATH, and accessible foundry models.